What's New at CertiChip?
September 2008: CertiChip Completes 65nm Test Chip
CertiChip has completed the
design of a 65nm test chip that contains a variety of circuits,
including CertiChip's Quatro line of SE robust flip flops.
This test chip is currently being fabricated in a mainstream CMOS
process and once complete it will be sent to TRIUMF's facility in
British Columbia to test soft error performance. The results of
this testing are expected to show that CertiChip's soft error
robust technology can be applied to both SRAM and flip flops, and
that CertiChip's solution scales with denser CMOS technologies.
July 2008: CertiChip Launches a New Web Site
Up until now CertiChip's web
presence has been a placeholder with only a brief description of
who CertiChip is and the focus of our technology. This page
formally announces the launch of our new expanded web site, which
includes more product information, detailed descriptions of the
soft error phenomena, a resource library containing links to
technical papers and industry articles pertaining to soft errors,
and a more detailed company profile of CertiChip. If you like what
you see and want to know more, click here to register with
CertiChip and once you log in you will be given
access to more product details.
May 2008: CertiChip Confirms SER Performance of 90 nm SRAM
Cell
Certichip has recently
completed testing of a 90nm standard CMOS validation vehicle at
TRIUMF's facility in British Columbia. The graph below shows
relative SER performance measured during these
tests.
