Technology
What are soft errors?
As CMOS processes scale for improved performance and power, the reliability and robustness of these products becomes an issue. There are several reasons for increased stress on circuit reliability and robustness. The increased parametric variations in extremely small transistors, higher power consumption, higher on chip (junction temperature) are often cited reasons for compromised reliability. In addition, radiation induced soft-errors have recently emerged as a significant consideration in the reliability and robustness of nano-metric ASICs. A soft-error occurs when an energetic particle (e.g., alpha particle, cosmic neutron) strikes a storage element (SRAM, flip-flop) on the ASIC, and causes it to change its logic state.Soft Errors in CMOS Technologies
The effects of soft errors have always been present in space-based applications, where radiation flux is very high. However, the reduced VDD and shrinking node capacitances in modern CMOS processes has resulted in the problem of soft errors becoming prevalent in other application domains. Memory circuits, such as SRAMs are especially vulnerable to soft errors, and as SRAM may occupy as much as 70% of the die area in a modern system-on-chip (SOC), ensuring soft error robustness is critical. Experts believe that soft error related failures in time (FITs) are 100-1000x higher compared to all other failures if no soft error mitigation strategy is deployed.CertiChip has developed and patented several circuit designs which significantly improve the soft-error robustness in CMOS circuits. This IP can enable companies to design ASICs in highly scaled CMOS technologies while ensuing that the soft-error robustness is not compromised.
Why should I be concerned with soft errors?
The
potential impact on typical memory applications illustrates the
importance of considering soft errors. A cell phone with one
4-Mbit, low-power memory with an SER of 1000 FITs per megabit will
likely have a soft error every 28 years. A high-end router with 10
Gbits of SRAM and an SER of 600 FITs per megabit can experience an
error every 170 hours. For a router farm that uses 100 Gbits of
memory, a potential networking error interrupting its proper
operation could occur every 17 hours. Finally, consider a person on
an airplane over the Atlantic at 35,000 ft working on a laptop with
256 Mbytes (2 Gbits) of memory. At this altitude, the SER of 600
FITs per megabit becomes 100,000 FITs per megabit, resulting in a
potential error every five hours.
Soft Errors' Impact on System Reliability, Ritesh Mastipuram and Edwin C Wee, Cypress Semiconductor , Electronic Design News, September 30, 2004
Soft Errors' Impact on System Reliability, Ritesh Mastipuram and Edwin C Wee, Cypress Semiconductor , Electronic Design News, September 30, 2004
How do soft errors occur?
Soft errors in SRAMs
Soft errors in logic
Soft error rate increases with scaling